Differenciál késleltető vonalak
Nagysebességű, többrétegű és nagy precizítású LTCC differenciális késleltető vonalak kaphatók az ELMEC Technology és a TFT Thin Film Technology palettájáról. Ezek Chip1210 és BGA tokozásban is hozzáférhetők.
További információ és lokális támogatás nyújtásához jelentkezését és kérdéseit várja magyarországi referensünk : Kiss Zoltán okl. villamosménök Tel.: (1) 297-4191 E-mail :
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CDKF
PDF, 73.8 kB » | The CDKF-type component, which utilizes an LTCC design, is a High-precision Differential Delay Line. | ELMEC | Info » |
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CDKD
PDF, 104.5 kB » | CDKD-type Delay Line is an LTCC (Low Temperature Co-fired Ceramic) laminated Chip-type Differential Delay Line. | ELMEC | Info » |
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CDAD
PDF, 113 kB » | The CDAD family of High-speed Differential Delay Line products is available in a surface-mount package. They are also available for a variety of logic types | ELMEC | Info » |
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CL2L 1210 Chip
PDF, 118.5 kB » | This specification applies to precision, differentially driven, thin film chip delay lines designed in a surface mount format. These high frequency ceramic delay lines are offered in a 1210 chip, and are tape and reel packaged for automated assembly. | TFT | Info » |
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GL2L 16Pin SOP
PDF, 171.6 kB » | his family of delay lines features high bandwidth performance with high reliability for timing control applications. They feature stripline shielded construction on ceramic with equally distributed capacitance for superior performance. These SMT differential products are useful in PECL applications and they contain two identical transmission lines matched for time delay. | TFT | Info » |
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HE2LA BGA
PDF, 195.8 kB » | High-efficiency delay lines for clock and data deskew in differential circuit designs requiring precise timing control in a small, low profile BGA package. The differential delay lines are constructed as broadside-coupled transmission lines on ceramic. These designs feature characteristics similar to unshielded twisted-pair cable. | TFT | Info » |
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HE2L5 BGA uncoupled
PDF, 222.2 kB » | High-efficiency delay lines for clock and data deskew in single-ended or differential circuit designs requiring precise timing control in a small, low profile BGA package. The 2 independent, uncoupled, mirror image delay lines are constructed as microstrip transmission lines on ceramic. | TFT | Info » |
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